18} generic_clock_generator_t;
20#define HAL_GPIO_PMUX_EIC (0)
21#define HAL_GPIO_PMUX_ADC (1)
22#define HAL_GPIO_PMUX_AC (1)
23#define HAL_GPIO_PMUX_PTC (1)
24#define HAL_GPIO_PMUX_SERCOM (2)
25#define HAL_GPIO_PMUX_SERCOM_ALT (3)
27#define DMAC_CHCTRLB_TRIGACT_BLOCK_Val (0)
28#define DMAC_CHCTRLB_TRIGACT_BEAT_Val (2)
29#define DMAC_CHCTRLB_TRIGACT_TRANSACTION_Val (3)
31typedef int DmacDescriptor;
35#define HAL_GPIO_PMUX_EIC HAL_GPIO_PMUX_A
36#define HAL_GPIO_PMUX_ADC HAL_GPIO_PMUX_B
37#define HAL_GPIO_PMUX_AC HAL_GPIO_PMUX_B
38#define HAL_GPIO_PMUX_PTC HAL_GPIO_PMUX_B
39#define HAL_GPIO_PMUX_SERCOM HAL_GPIO_PMUX_C
40#define HAL_GPIO_PMUX_SERCOM_ALT HAL_GPIO_PMUX_D
42#if defined(__SAMD11C14A__) || defined(__ATSAMD11C14A__) || \
43 defined(__SAMD11D14AM__) || defined(__ATSAMD11D14AM__) || \
44 defined(__SAMD11D14AS__) || defined(__ATSAMD11D14AS__) || \
45 defined(__SAMD11D14AU__) || defined(__ATSAMD11D14AU__)
47#define HAL_GPIO_PMUX_DAC HAL_GPIO_PMUX_B
48#define HAL_GPIO_PMUX_TC_TCC HAL_GPIO_PMUX_E
49#define HAL_GPIO_PMUX_TCC_ALT HAL_GPIO_PMUX_F
50#define HAL_GPIO_PMUX_COM HAL_GPIO_PMUX_G
51#define HAL_GPIO_PMUX_GCLK HAL_GPIO_PMUX_H
54 GENERIC_CLOCK_0 = GCLK_CLKCTRL_GEN_GCLK0_Val,
55 GENERIC_CLOCK_1 = GCLK_CLKCTRL_GEN_GCLK1_Val,
56 GENERIC_CLOCK_2 = GCLK_CLKCTRL_GEN_GCLK2_Val,
57 GENERIC_CLOCK_3 = GCLK_CLKCTRL_GEN_GCLK3_Val,
58 GENERIC_CLOCK_4 = GCLK_CLKCTRL_GEN_GCLK4_Val,
59 GENERIC_CLOCK_5 = GCLK_CLKCTRL_GEN_GCLK5_Val,
60} generic_clock_generator_t;
63#if defined(__SAMD21E15A__) || defined(__ATSAMD21E15A__) || \
64 defined(__SAMD21E16A__) || defined(__ATSAMD21E16A__) || \
65 defined(__SAMD21E17A__) || defined(__ATSAMD21E17A__) || \
66 defined(__SAMD21E18A__) || defined(__ATSAMD21E18A__) || \
67 defined(__SAMD21G15A__) || defined(__ATSAMD21G15A__) || \
68 defined(__SAMD21G16A__) || defined(__ATSAMD21G16A__) || \
69 defined(__SAMD21G17A__) || defined(__ATSAMD21G17A__) || \
70 defined(__SAMD21G17AU__) || defined(__ATSAMD21G17AU__) || \
71 defined(__SAMD21G18A__) || defined(__ATSAMD21G18A__) || \
72 defined(__SAMD21G18AU__) || defined(__ATSAMD21G18AU__) || \
73 defined(__SAMD21J15A__) || defined(__ATSAMD21J15A__) || \
74 defined(__SAMD21J16A__) || defined(__ATSAMD21J16A__) || \
75 defined(__SAMD21J17A__) || defined(__ATSAMD21J17A__) || \
76 defined(__SAMD21J18A__) || defined(__ATSAMD21J18A__)
78#define HAL_GPIO_PMUX_DAC HAL_GPIO_PMUX_B
79#define HAL_GPIO_PMUX_TC_TCC HAL_GPIO_PMUX_E
80#define HAL_GPIO_PMUX_TCC_ALT HAL_GPIO_PMUX_F
81#define HAL_GPIO_PMUX_COM HAL_GPIO_PMUX_G
82#define HAL_GPIO_PMUX_GCLK HAL_GPIO_PMUX_H
83#define HAL_GPIO_PMUX_AC_OUTPUT HAL_GPIO_PMUX_H
86 GENERIC_CLOCK_0 = GCLK_CLKCTRL_GEN_GCLK0_Val,
87 GENERIC_CLOCK_1 = GCLK_CLKCTRL_GEN_GCLK1_Val,
88 GENERIC_CLOCK_2 = GCLK_CLKCTRL_GEN_GCLK2_Val,
89 GENERIC_CLOCK_3 = GCLK_CLKCTRL_GEN_GCLK3_Val,
90 GENERIC_CLOCK_4 = GCLK_CLKCTRL_GEN_GCLK4_Val,
91 GENERIC_CLOCK_5 = GCLK_CLKCTRL_GEN_GCLK5_Val,
92 GENERIC_CLOCK_6 = GCLK_CLKCTRL_GEN_GCLK6_Val,
93 GENERIC_CLOCK_7 = GCLK_CLKCTRL_GEN_GCLK7_Val,
94 GENERIC_CLOCK_8 = GCLK_CLKCTRL_GEN_GCLK8_Val,
95} generic_clock_generator_t;
98#if defined(__SAML21E15B__) || defined(__ATSAML21E15B__) || \
99 defined(__SAML21E16B__) || defined(__ATSAML21E16B__) || \
100 defined(__SAML21E17B__) || defined(__ATSAML21E17B__) || \
101 defined(__SAML21E18B__) || defined(__ATSAML21E18B__) || \
102 defined(__SAML21G16B__) || defined(__ATSAML21G16B__) || \
103 defined(__SAML21G17B__) || defined(__ATSAML21G17B__) || \
104 defined(__SAML21G18B__) || defined(__ATSAML21G18B__) || \
105 defined(__SAML21J16B__) || defined(__ATSAML21J16B__) || \
106 defined(__SAML21J17B__) || defined(__ATSAML21J17B__) || \
107 defined(__SAML21J17BU__) || defined(__ATSAML21J17BU__) || \
108 defined(__SAML21J18B__) || defined(__ATSAML21J18B__) || \
109 defined(__SAML21J18BU__) || defined(__ATSAML21J18BU__)
111#define HAL_GPIO_PMUX_DAC HAL_GPIO_PMUX_B
112#define HAL_GPIO_PMUX_OPAMP HAL_GPIO_PMUX_B
113#define HAL_GPIO_PMUX_TC_TCC HAL_GPIO_PMUX_E
114#define HAL_GPIO_PMUX_TCC_ALT HAL_GPIO_PMUX_F
115#define HAL_GPIO_PMUX_COM HAL_GPIO_PMUX_G
116#define HAL_GPIO_PMUX_GCLK HAL_GPIO_PMUX_H
117#define HAL_GPIO_PMUX_SUPC HAL_GPIO_PMUX_H
118#define HAL_GPIO_PMUX_AC_OUTPUT HAL_GPIO_PMUX_H
119#define HAL_GPIO_PMUX_CCL HAL_GPIO_PMUX_I
122 GENERIC_CLOCK_0 = GCLK_PCHCTRL_GEN_GCLK0_Val,
123 GENERIC_CLOCK_1 = GCLK_PCHCTRL_GEN_GCLK1_Val,
124 GENERIC_CLOCK_2 = GCLK_PCHCTRL_GEN_GCLK2_Val,
125 GENERIC_CLOCK_3 = GCLK_PCHCTRL_GEN_GCLK3_Val,
126 GENERIC_CLOCK_4 = GCLK_PCHCTRL_GEN_GCLK4_Val,
127 GENERIC_CLOCK_5 = GCLK_PCHCTRL_GEN_GCLK5_Val,
128 GENERIC_CLOCK_6 = GCLK_PCHCTRL_GEN_GCLK6_Val,
129 GENERIC_CLOCK_7 = GCLK_PCHCTRL_GEN_GCLK7_Val,
130 GENERIC_CLOCK_8 = GCLK_PCHCTRL_GEN_GCLK8_Val,
131} generic_clock_generator_t;
134#if defined(__SAML22G16A__) || defined(__ATSAML22G16A__) || \
135 defined(__SAML22G17A__) || defined(__ATSAML22G17A__) || \
136 defined(__SAML22G18A__) || defined(__ATSAML22G18A__) || \
137 defined(__SAML22J16A__) || defined(__ATSAML22J16A__) || \
138 defined(__SAML22J17A__) || defined(__ATSAML22J17A__) || \
139 defined(__SAML22J18A__) || defined(__ATSAML22J18A__) || \
140 defined(__SAML22N16A__) || defined(__ATSAML22N16A__) || \
141 defined(__SAML22N17A__) || defined(__ATSAML22N17A__) || \
142 defined(__SAML22N18A__) || defined(__ATSAML22N18A__)
144#define HAL_GPIO_PMUX_SLCD HAL_GPIO_PMUX_B
145#define HAL_GPIO_PMUX_TC_TCC HAL_GPIO_PMUX_E
146#define HAL_GPIO_PMUX_TCC_ALT HAL_GPIO_PMUX_F
147#define HAL_GPIO_PMUX_RTC_PB01_IN2 HAL_GPIO_PMUX_F
148#define HAL_GPIO_PMUX_COM HAL_GPIO_PMUX_G
149#define HAL_GPIO_PMUX_RTC HAL_GPIO_PMUX_G
150#define HAL_GPIO_PMUX_GCLK HAL_GPIO_PMUX_H
151#define HAL_GPIO_PMUX_SUPC HAL_GPIO_PMUX_H
152#define HAL_GPIO_PMUX_AC_OUTPUT HAL_GPIO_PMUX_H
153#define HAL_GPIO_PMUX_CCL HAL_GPIO_PMUX_I
156 GENERIC_CLOCK_0 = GCLK_PCHCTRL_GEN_GCLK0_Val,
157 GENERIC_CLOCK_1 = GCLK_PCHCTRL_GEN_GCLK1_Val,
158 GENERIC_CLOCK_2 = GCLK_PCHCTRL_GEN_GCLK2_Val,
159 GENERIC_CLOCK_3 = GCLK_PCHCTRL_GEN_GCLK3_Val,
160 GENERIC_CLOCK_4 = GCLK_PCHCTRL_GEN_GCLK4_Val,
161} generic_clock_generator_t;
164#if defined(__SAMD51G18A__) || defined(__ATSAMD51G18A__) || \
165 defined(__SAMD51G19A__) || defined(__ATSAMD51G19A__) || \
166 defined(__SAMD51J18A__) || defined(__ATSAMD51J18A__) || \
167 defined(__SAMD51J19A__) || defined(__ATSAMD51J19A__) || \
168 defined(__SAMD51J20A__) || defined(__ATSAMD51J20A__) || \
169 defined(__SAMD51N19A__) || defined(__ATSAMD51N19A__) || \
170 defined(__SAMD51N20A__) || defined(__ATSAMD51N20A__) || \
171 defined(__SAMD51P19A__) || defined(__ATSAMD51P19A__) || \
172 defined(__SAMD51P20A__) || defined(__ATSAMD51P20A__)
174#define HAL_GPIO_PMUX_TC HAL_GPIO_PMUX_E
175#define HAL_GPIO_PMUX_TCC HAL_GPIO_PMUX_F
176#define HAL_GPIO_PMUX_TCC_ALT HAL_GPIO_PMUX_G
177#define HAL_GPIO_PMUX_COM HAL_GPIO_PMUX_H
178#define HAL_GPIO_PMUX_COM_ALT HAL_GPIO_PMUX_I
179#define HAL_GPIO_PMUX_I2S HAL_GPIO_PMUX_J
180#define HAL_GPIO_PMUX_PCC HAL_GPIO_PMUX_K
181#define HAL_GPIO_PMUX_GMAC HAL_GPIO_PMUX_L
182#define HAL_GPIO_PMUX_GCLK HAL_GPIO_PMUX_M
183#define HAL_GPIO_PMUX_AC_OUTPUT HAL_GPIO_PMUX_M
184#define HAL_GPIO_PMUX_CCL HAL_GPIO_PMUX_N
187 GENERIC_CLOCK_0 = GCLK_PCHCTRL_GEN_GCLK0_Val,
188 GENERIC_CLOCK_1 = GCLK_PCHCTRL_GEN_GCLK1_Val,
189 GENERIC_CLOCK_2 = GCLK_PCHCTRL_GEN_GCLK2_Val,
190 GENERIC_CLOCK_3 = GCLK_PCHCTRL_GEN_GCLK3_Val,
191 GENERIC_CLOCK_4 = GCLK_PCHCTRL_GEN_GCLK4_Val,
192 GENERIC_CLOCK_5 = GCLK_PCHCTRL_GEN_GCLK5_Val,
193 GENERIC_CLOCK_6 = GCLK_PCHCTRL_GEN_GCLK6_Val,
194 GENERIC_CLOCK_7 = GCLK_PCHCTRL_GEN_GCLK7_Val,
195 GENERIC_CLOCK_8 = GCLK_PCHCTRL_GEN_GCLK8_Val,
196 GENERIC_CLOCK_9 = GCLK_PCHCTRL_GEN_GCLK9_Val,
197 GENERIC_CLOCK_10 = GCLK_PCHCTRL_GEN_GCLK10_Val,
198 GENERIC_CLOCK_11 = GCLK_PCHCTRL_GEN_GCLK11_Val,
199} generic_clock_generator_t;